⏱️ Lectura: 12 min
AMD acquired Taalas, a Toronto startup that, instead of storing a language model’s weights in HBM memory, etches them directly into the chip’s silicon. According to the first benchmarks published by the company itself, its first chip served Llama 3.1 8B at 16,960 tokens per second, up to 48 times faster than an Nvidia GPU on the same task.
📑 En este artículo
The announcement came on Thursday, August 6, 2026, after market close, and AMD did not disclose the deal’s value. For a company competing against Nvidia in the AI inference market, it’s the most radical bet yet: abandoning the general-purpose GPU for a specific niche, serving an already-trained model, and doing it as fast as possible.
TL;DR
- AMD acquired Taalas, a Toronto startup founded in 2023, in a deal announced on August 6, 2026 after market close, with no disclosed value.
- Taalas’s HC1 chip, built on TSMC’s 6nm process and unveiled in February 2026, serves Llama 3.1 8B at 16,960 tokens per second.
- That figure is 48 times faster than an Nvidia GPU and 8.5 times faster than a Cerebras wafer-scale accelerator, according to Taalas.
- The second-generation chip, HC2, arrives this summer of 2026 with capacity for 20 billion parameters.
- AMD plans to combine Instinct Helios racks with Taalas accelerators in a disaggregated architecture: GPUs for the prompt, Taalas for generating tokens.
- Etching a model into silicon costs, according to Taalas, 100 times less than training a frontier model.
- The move mirrors the logic of Nvidia’s $20 billion deal with Groq announced in December 2025.
- The core limitation: once a model is etched in, changing it requires a manufacturing re-spin, though just two new metal layers are enough.
What Happened
The deal closed as an outright acquisition, not a talent grab dressed up as a purchase (what Silicon Valley jargon calls an acquihire). AMD absorbs both the technology and the team at Taalas, founded in 2023 in Toronto. According to The Register, the fit with AMD has a very concrete logic: AMD already has the rack-level system design and the commercial relationships with major AI labs that Taalas was missing to bring its technology to production.
Vamsi Boppana, AMD’s senior vice president of AI, summed up the move like this:
AMD is building a full-stack AI platform that gives customers the flexibility to deploy the right compute solution for every AI workload. (Vamsi Boppana, AMD SVP of AI)
The phrase is deliberately ambiguous about what replaces what. And that ambiguity is the key to the whole move: Taalas isn’t coming to replace AMD’s Instinct GPUs, it’s coming to complement them in one very specific type of work: token generation in high-volume inference.
Context and Background
The comparison the industry drew as soon as the news broke was with the $20 billion licensing deal Nvidia signed with Groq in December 2025. That deal also targeted premium inference for AI agents, like coding assistants, where latency matters as much as cost. With Taalas, AMD is looking to play the same game but with an even more radical architecture: instead of a dataflow chip like Groq’s LPU, a chip whose model weights aren’t stored in separate memory but etched into its own physical structure.
Taalas calls its approach MSIC, for model-specific integrated circuit. The idea isn’t new in hardware: ASICs have been custom-built for specific tasks for decades, but applying it to a full language model, with billions of parameters physically etched in, is a leap nobody had brought into real production until now.
💭 Key takeaway: According to Taalas, etching a model’s weights into silicon costs roughly 100 times less than training a frontier model from scratch. That’s what makes it viable to re-manufacture a chip every time a relevant new model comes out.
Technical Details and Performance
Internally, a Taalas chip is divided into two regions. The first is the mask-ROM recall fabric, where the model’s weights are permanently etched during manufacturing. The second is the SRAM recall fabric, a read-write memory that holds whatever does change in real time: each conversation’s KV cache and LoRA-style fine-tuning adapters.
That separation explains the performance jump. On a conventional GPU, every generated token requires reading the model’s full weights from HBM memory, a bandwidth bottleneck that dominates the cost of the generation phase, unlike prefill, where compute does saturate the GPU. By etching the weights directly into the silicon, Taalas eliminates that round trip to external memory.
The HC1 test chip was unveiled in February 2026, built on the 6nm process from TSMC. Serving Llama 3.1 8B (an already old model by 2026 standards, released in mid-2024), Taalas reported 16,960 tokens per second, 48 times faster than an Nvidia GPU and 8.5 times faster than a Cerebras wafer-scale accelerator on the same benchmark. The HC1 wasn’t meant for production: it was proof that the physical concept works.
The second chip, the HC2, arrives this summer of 2026 with capacity for 20 billion parameters per unit. That number looks small next to today’s frontier models, but the key is horizontal scaling: just as with GPUs, a large model’s weights get split across multiple chips using pipeline parallelism. At 20 billion parameters per chip, it takes just 50 units to cover a trillion-parameter model.
For scale: according to AMD, serving that same trillion-parameter model on the LPX systems Nvidia recently unveiled would require several dozen GPUs plus at least 2,000 Groq LPUs. Fifty Taalas chips versus that combination is a considerable difference in physical footprint and power consumption.
flowchart TD
A["User prompt"] --> B["AMD Instinct GPU - prefill"]
B --> C["Initial KV cache"]
C --> D["Taalas HC2 chip - token generation"]
D --> E["Streaming response"]
subgraph Helios Rack
B
D
endThat diagram sums up the architecture AMD plans to deploy: Instinct Helios racks handling the prefill, the phase where the full prompt gets processed and a flexible GPU is actually the right fit, and Taalas chips handling token-by-token generation, where latency and memory bandwidth are the bottleneck.
How to Try It Today
Taalas chips still aren’t available outside AMD and its direct customers, so there’s no way to run an HC1 or HC2 on your own machine. What you can do today is measure the metric that made Taalas famous, tokens per second, on your own GPU, to get a real reference point before taking any marketing benchmark at face value.
With vLLM you can spin up an OpenAI-API-compatible inference server in minutes:
# Linux / macOS
pip install vllm
python -m vllm.entrypoints.openai.api_server \
--model meta-llama/Llama-3.1-8B-Instruct \
--port 8000# Windows (PowerShell, requires WSL2 with CUDA)
wsl --install
wsl -- pip install vllm
wsl -- python -m vllm.entrypoints.openai.api_server --model meta-llama/Llama-3.1-8B-Instruct --port 8000That spins up the same model Taalas used in its February benchmark, Llama 3.1 8B, on your own GPU. This script measures real tokens per second against that endpoint:
import time
import requests
prompt = "Explain what inference of a language model is in two sentences."
inicio = time.time()
respuesta = requests.post(
"http://localhost:8000/v1/completions",
json={
"model": "meta-llama/Llama-3.1-8B-Instruct",
"prompt": prompt,
"max_tokens": 256,
},
)
transcurrido = time.time() - inicio
tokens_generados = respuesta.json()["usage"]["completion_tokens"]
print(f"{tokens_generados / transcurrido:.1f} tokens/second")The number that script returns on a consumer GPU will almost certainly be far below Taalas’s 16,960 tokens per second: the comparison is useful for understanding the scale of the jump AMD is talking about, not for reproducing it.
If you also want to understand the pipeline parallelism calculation mentioned above, this script does exactly the math that leads to 50 chips per trillion-parameter model:
def chips_necesarios(parametros_totales_b, parametros_por_chip_b=20):
# Round up: parameters in billions (b = billions)
return -(-parametros_totales_b // parametros_por_chip_b)
print(chips_necesarios(1000)) # 50 HC2 chips for a 1 trillion parameter model
Impact and Analysis
The move has an obvious reading for the three major model labs: OpenAI, Anthropic, and Meta are already major customers of AMD’s Instinct GPUs. Given that existing commercial relationship, it wouldn’t be surprising to see a version of GPT or Claude running on a combination of Taalas and Instinct chips in the same data center, though for now that’s industry speculation and not something AMD has confirmed.
A staggered adoption pattern is also plausible: customers first validate a new model on Instinct GPUs, where switching versions is as simple as updating a checkpoint, and only once they’re confident that model will stay in production for months do they migrate that workload to Taalas chips to gain speed and lower the cost per token.
| Option | When to use it | Advantage | Limitation |
|---|---|---|---|
| GPU (AMD Instinct / Nvidia) | Training and serving models that change frequently | Flexible, runs any architecture without re-manufacturing anything | HBM memory bandwidth limits the generation phase |
| LPU (Groq) | Low-latency inference for a fixed model, without re-manufacturing silicon | Deterministic dataflow architecture, very good latency per token | Needs thousands of chained chips for large models |
| Wafer-scale (Cerebras) | Training or serving enormous models on a single physical system | Avoids the interconnect bottleneck between separate chips | Cost and complexity of manufacturing a full wafer |
| MSIC (Taalas) | Serving a validated model that’s stable over time, at volume | Up to 48 times more tokens per second than a GPU on the same benchmark | Switching models requires a manufacturing re-spin of the chip |
That last limitation is the real trade-off of Taalas’s entire proposition. Once a model is etched into the silicon, there’s no way to update it with a simple software deployment. Minor tweaks, LoRA-adapter-sized, can be applied because they live in the chip’s rewritable SRAM region. But an architecture change or a new version of the base model has to go back through the factory.
⚠️ Heads up: If your product depends on updating the model every few weeks, increasingly common in 2026, a Taalas chip isn’t the right choice. Taalas says a re-spin only requires changing two metal layers, not redesigning the whole chip, but it’s still a manufacturing cycle, not a software deploy.
That tension, extreme speed in exchange for losing the ability to iterate on the model, is the same one teams face today when choosing between a closed model that’s constantly updated or an open one they lock into a stable version for months. Taalas takes that decision down to the hardware level.
What’s Next
Taalas’s HC2, with its 20 billion parameters per chip, is the missing piece to find out whether this technology holds up beyond demos. Its launch is slated for this summer of 2026, and it’ll be the first time a chip of this kind has enough capacity to serve a model with real commercial relevance, not just a Llama 3.1 8B as a proof of concept.
What will determine whether AMD bet correctly is whether any of its major Instinct customers (OpenAI, Anthropic, or Meta) announces a concrete deployment on the combined Helios-Taalas architecture in the coming months. Until then, all there is are lab benchmarks and an acquisition that still hasn’t revealed its price.
Try it yourself: if you have a GPU available, run the vLLM benchmark from the previous section against Llama 3.1 8B and compare your own tokens-per-second number to the 16,960 Taalas reported in February.
📖 Summary on Telegram: View summary
Frequently Asked Questions
What is an MSIC?
An MSIC (model-specific integrated circuit) is a chip designed and manufactured for a particular AI model, with its weights physically etched into the silicon instead of stored in external memory like HBM.
Why does etching weights into silicon make inference faster?
Because it eliminates the round trip to external memory that dominates the cost of the token generation phase on a conventional GPU. The weights are already physically where they’re needed, instead of having to be read from HBM at every step.
What happens if the model etched into the chip becomes outdated?
Small tweaks, LoRA-adapter-sized, can be applied without re-manufacturing anything because they live in the chip’s rewritable SRAM region. But a new version of the base model requires a re-spin: according to Taalas, it only takes changing two metal layers, not the entire design.
Does this replace AMD’s Instinct GPUs?
Not according to what AMD announced. The idea is a disaggregated architecture where Instinct GPUs process the prompt (prefill) and Taalas chips generate the output tokens, within the same Helios rack.
How much did the Taalas acquisition cost?
AMD did not disclose the deal’s value. According to The Register, everything points to it being a full acquisition and not an acquihire.
Who could be the first customers for this technology?
OpenAI, Anthropic, and Meta are already major customers of AMD’s Instinct GPUs, which makes them natural candidates to also adopt Taalas chips once the HC2 is available.
References
- The Register: original coverage of AMD’s announcement of the Taalas acquisition.
- AMD: official site of the company that acquired Taalas.
- TSMC (Wikipedia): manufacturer of the 6nm process used in Taalas’s HC1 chip.
- Cerebras Systems (Wikipedia): manufacturer of the wafer-scale accelerators used as a comparison point in Taalas’s benchmarks.
📱 Enjoy this content? Follow @programacion on Telegram for daily tech content in Spanish: quick summaries, fresh content every day.
Imagen destacada: Foto de Vishnu Mohanan en Unsplash
0 Comments